Samsung Electronics Co., Ltd. announced that it has begun mass production for its one-terabit (Tb) triple-level cell (TLC) 9th-generation vertical NAND (V-NAND), solidifying its leadership in the NAND flash market. With the industry's smallest cell size and thinnest mold, Samsung improved the bit density of the 9th-generation V-NAND by about 50% compared to the 8th-generation V-Nand. New innovations such as cell interference avoidance and cell life extension have been applied to enhance product quality and reliability, while eliminating dummy channel holes has significantly reduced the planar area of the memory cells.

In addition, Samsung's advanced "channel hole etching" technology showcases the company's leadership in process capabilities. This technology creates electron pathways by stacking mold layers and maximizes fabrication productivity as it enables simultaneous drilling of the industry's higher cell layer count in a double-stack structure. As the number of cell layers increase, the ability to pierce through higher cell numbers becomes essential, demanding more sophisticated etching techniques.

The 9th-generation V- NAND is equipped with the next-generation NAND flash interface, "Toggle 5.1," which supports increased data input/output speeds by 33% to up to 3.2 gigabits-per-second (Gbps). Along with this new interface, Samsung plans to solidify its position within the high-performance SSD market by expanding support for PCIe 5.0. Power consumption has also been improved by 10% with advancements in low-power design, compared to the previous generation. As reducing energy usage and carbon emissions become vital for customers, Samsung's 9th-generation V-SAND is expected to be an optimal solution for future applications.

Samsung has started mass production for the 1Tb TLC 9th-generation V-RAND this month, followed by the quad level cell (QLC) model in the second half of this year.