KLA Tencor : Patent Issued for Measurement Model Optimization Based on Parameter Variations across a Wafer (USPTO 9721055)
The assignee for this patent, patent number 9721055, is
Reporters obtained the following quote from the background information supplied by the inventors: "Semiconductor devices such as logic and memory devices are typically fabricated by a sequence of processing steps applied to a specimen. The various features and multiple structural levels of the semiconductor devices are formed by these processing steps. For example, lithography among others is one semiconductor fabrication process that involves generating a pattern on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing, etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated on a single semiconductor wafer and then separated into individual semiconductor devices.
"Metrology processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield. Optical metrology techniques offer the potential for high throughput without the risk of sample destruction. A number of optical metrology based techniques including scatterometry and reflectometry implementations and associated analysis algorithms are commonly used to characterize critical dimensions, film thicknesses, composition and other parameters of nanoscale structures.
"Traditionally, optical metrology is performed on targets consisting of thin films and/or repeated periodic structures. During device fabrication, these films and periodic structures typically represent the actual device geometry and material structure or an intermediate design. As devices (e.g., logic and memory devices) move toward smaller nanometer-scale dimensions, characterization becomes more difficult. Devices incorporating complex three-dimensional geometry and materials with diverse physical properties contribute to characterization difficulty.
"For example, modern memory structures are often high-aspect ratio, three-dimensional structures that make it difficult for optical radiation to penetrate to the bottom layers. In addition, the increasing number of parameters required to characterize complex structures (e.g., FinFETs), leads to increasing parameter correlation. As a result, the measurement model parameters characterizing the target often cannot be reliably decoupled.
"In response to these challenges, more complex optical tools have been developed. Measurements are performed over a large ranges of several machine parameters (e.g., wavelength, azimuth and angle of incidence, etc.), and often simultaneously. As a result, the measurement time, computation time, and the overall time to generate reliable results, including measurement recipes, increases significantly. In addition, the spreading of light intensity over large wavelength ranges decreases illumination intensity at any particular wavelength and increases signal uncertainty of measurements performed at that wavelength.
"Future metrology applications present challenges for metrology due to increasingly small resolution requirements, multi-parameter correlation, increasingly complex geometric structures, and increasing use of opaque materials. Thus, methods and systems for improved measurements are desired."
In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventor's summary information for this patent: "Methods and systems for generating optimized measurement models for metrology systems configured to measure structural and material characteristics associated with different semiconductor fabrication processes are presented.
"In one aspect, an optimized measurement model is determined based on modeling of parameter variations across a semiconductor wafer. Variations of one or more specimen parameters are modeled globally (i.e., across the surface of the wafer). The measurement model definition is improved by constraining the measurement model with a cross-wafer model of process variations.
"In many embodiments, process induced variations appear as spatial patterns across the wafer (e.g., radially symmetric thin film thickness patterns with a U or W shape). These patterns generally result from smooth and continuous parameter changes across the wafer. The cross-wafer model characterizes a specimen parameter value as a function of location on the wafer.
"In some examples, the cross-wafer model is itself a parameterized model, but with far fewer parameters than a measurement model that treats the specimen parameter as a different unknown at every location.
"In some examples, the cross-wafer model gives rise to constraints on the relationships among unknown specimen parameters based on location on the wafer. In this manner the cross-wafer model gives rise to functional relationships between specimen parameters associated with groups of measurement sites based on their location on the wafer.
"The measurement model is constrained by the cross-wafer model of parameter variations. In this manner, the set of parameters that must be fitted to arrive at a measurement solution is reduced. This results in less correlation among parameters, more accurate measurement results, and less computation time for library generation, fitting, and analysis. For example, correlation between the thickness of layers and a grating structure fabricated on top of the layers is eliminated or significantly reduced. Accuracy is improved because the modeled parameters are floated and constrained across the wafer instead of fixed to some nominal value. In some examples, the optimized measurement model enables measurements with fewer measurement technologies and reduced range of illumination wavelengths to achieve satisfactory measurement results. In some examples, measurement systems employing high intensity light sources within limited wavelength ranges is enabled by the optimized measurement model.
"The foregoing is a summary and thus contains, by necessity, simplifications, generalizations and omissions of detail; consequently, those skilled in the art will appreciate that the summary is illustrative only and is not limiting in any way. Other aspects, inventive features, and advantages of the devices and/or processes described herein will become apparent in the non-limiting detailed description set forth herein."
For more information, see this patent: Pandev,
Keywords for this news article include: Electronics, Semiconductor,
Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2017, NewsRx LLC
(c) 2017 NewsRx LLC, source